-- VHDL Source of 8259 Programmable Interrupt Controller
-- Discribe of components
-- 1. Data BUS buffer
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity CS_8259_DATABUS is
	port(
		   DIN  : inout std_logic_vector(7 downto 0);
		   DOUT : inout std_logic_vector(7 downto 0)
	    );
end CS_8259_DATABUS;
-- Integration of Components
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity CS_8259_UNIT is
	generic (
			  REG_8BIT_SIZE : positive := 8;
			  CAS_SIZE      : positive := 3
		   );
	port(
		   -- Read\Write Logic
		   A0        : in    std_logic;
		   RD_N      : in    std_logic;
		   WR_N      : in    std_logic;
		   CS        : in    std_logic;
		   -- Ctrl Logic
		   INTA_N    : in    std_logic;
		   INT       : in    std_logic;
		   -- Data bus
		   D         : inout std_logic_vector(REG_8BIT_SIZE -1 downto 0);
		   -- ascade Buffer\Compare
		   CAS       : inout std_logic_vector(2 downto 0);
		   SP_N_EN_N : in    std_logic;
		   -- Interrupts inputs
		   IRQ       : in    std_logic_vector(REG_8BIT_SIZE -1 downto 0)
	    );
end CS_8259_UNIT;
architecture CS_8259_UNIT_arch of CS_8259_UNIT is
	component CS_8259_DATABUS
	port(
		   DIN  : inout std_logic_vector(7 downto 0);
		   DOUT : inout std_logic_vector(7 downto 0)
	    );
	end component;
begin
end CS_8259_UNIT_arch;